v2 / thirdparty / libatomic_ops / atomic_ops / sysdeps / gcc / sparc.h
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1/*
2 * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
3 * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
4 * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved.
5 *
6 *
7 * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
8 * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
9 *
10 * Permission is hereby granted to use or copy this program
11 * for any purpose, provided the above notices are retained on all copies.
12 * Permission to modify the code and to distribute modified code is granted,
13 * provided the above notices are retained, and a notice that the code was
14 * modified is included with the above copyright notice.
15 *
16 */
17
18#if (AO_GNUC_PREREQ(12, 0) || AO_CLANG_PREREQ(13, 0)) \
19 && !defined(AO_DISABLE_GCC_ATOMICS)
20 /* Probably, it could be enabled for earlier compiler versions as well. */
21
22# include "generic.h"
23
24#else /* AO_DISABLE_GCC_ATOMICS */
25
26#include "../all_atomic_load_store.h"
27
28/* Real SPARC code uses TSO: */
29#include "../ordered_except_wr.h"
30
31/* Test_and_set location is just a byte. */
32#include "../test_and_set_t_is_char.h"
33
34AO_INLINE AO_TS_VAL_t
35AO_test_and_set_full(volatile AO_TS_t *addr) {
36 AO_TS_VAL_t oldval;
37
38 __asm__ __volatile__("ldstub %1,%0"
39 : "=r"(oldval), "=m"(*addr)
40 : "m"(*addr) : "memory");
41 return oldval;
42}
43#define AO_HAVE_test_and_set_full
44
45#ifndef AO_NO_SPARC_V9
46
47# ifndef AO_GENERALIZE_ASM_BOOL_CAS
48/* Returns nonzero if the comparison succeeded. */
49AO_INLINE int
50AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) {
51 __asm__ __volatile__ ("membar #StoreLoad | #LoadLoad\n\t"
52# if defined(__arch64__)
53 "casx [%1],%2,%0\n\t"
54# else
55 "cas [%1],%2,%0\n\t" /* 32-bit version */
56# endif
57 "membar #StoreLoad | #StoreStore\n\t"
58 : "+r" (new_val)
59 : "r" (addr), "r" (old)
60 : "memory");
61 return new_val == old;
62}
63# define AO_HAVE_compare_and_swap_full
64# endif /* !AO_GENERALIZE_ASM_BOOL_CAS */
65
66AO_INLINE AO_t
67AO_fetch_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) {
68 __asm__ __volatile__ ("membar #StoreLoad | #LoadLoad\n\t"
69# if defined(__arch64__)
70 "casx [%1],%2,%0\n\t"
71# else
72 "cas [%1],%2,%0\n\t" /* 32-bit version */
73# endif
74 "membar #StoreLoad | #StoreStore\n\t"
75 : "+r" (new_val)
76 : "r" (addr), "r" (old)
77 : "memory");
78 return new_val;
79}
80#define AO_HAVE_fetch_compare_and_swap_full
81
82#endif /* !AO_NO_SPARC_V9 */
83
84/* TODO: Extend this for SPARC v8 and v9 (V8 also has swap, V9 has CAS, */
85/* there are barriers like membar #LoadStore, CASA (32-bit) and */
86/* CASXA (64-bit) instructions added in V9). */
87
88#endif /* AO_DISABLE_GCC_ATOMICS */
89